Case Studies - Software & Validation
Project Higlights : Software & Validation
- SPICE Simulator
- Compiler for Low Power
- Mixed-HDL (Verilog + VHDL + SV) support using 3rd party front-end
- Mapping 3rd party synthesized Netlist to tool's native Netlist
- Several key validation projects
- Management of the entire nightly Regression System
- Simulation Kernel for Verilog
- Spectre to Spice Simulator
- VCD Parser and Power Report Generation